The present invention relates to the field of integrated circuits. More specifically, the present invention provides techniques and circuitry for reducing parasitics, crosstalk, noise, and other similar properties when propagating signals on the interconnect lines of an integrated circuit, which will improve the performance and reliability of the integrated circuit.
In an electronic circuit, such as a integrated circuit or printed circuit board, there are many interconnections between the various circuits and devices. These interconnections or interconnect lines may be made using wires, conductive interconnect layers, metal lines, polysilicon lines, polysilicide lines, and diffusion layers, just to name a few. To allow for efficient layout of the integrated circuits, interconnect lines are typically grouped together and run adjacent to another, or organized in a bus structure.
Various types of integrated circuits, all of which use interconnect lines, include microprocessors, static random access memories (SRAMs), erasable-programmable read only memories (EPROMs), electrically erasable programmable read only memories (EEPROMs), Flash EEPROM memories, programmable logic devices (PLDs), field programmable gate arrays (FPGAs), application specific integrated circuits (ASICs), among others.
In particular, PLDs are well known to those in the electronic art. Such programmable logic devices are commonly referred as PALs (Programmable Array Logic), PLAs (Programmable Logic Arrays), FPLAs, PLDs, EPLDs (Erasable Programmable Logic Devices), EEPLDs (Electrically Erasable Programmable Logic Devices), LCAs (Logic Cell Arrays), FPGAs (Field Programmable Gate Arrays), and the like. Such devices are used in a wide array of applications where it is desirable to program standard, off-the-shelf devices for a specific application. Such devices include, for example, the well-known, Classic.TM., and MAX.RTM. 5000, MAX.RTM. 7000, and FLEX.RTM. 8000, FLEX.RTM. 10K programmable integrated circuits made by Altera Corp.
PLDs are generally known in which many logic array blocks (LABs) are provided in a two-dimensional array. LABs contain a number of individual programmable logic elements (LEs) which provide relatively elementary logic functions such as NAND, NOR, and exclusive OR. Further, PLDs have an array of intersecting signal conductors for programmably selecting and conducting logic signals to, from, and between the LABs and LEs. As can be appreciated, many interconnect lines are used to facilitate the interconnections between the various logical features. Interconnect are conductors on the integrated circuit which are used to wire and connect together the devices, gates, transistors, logical blocks, pads, and other components. As integrated circuits become larger and denser, there will be greater numbers of interconnect lines per integrated circuit. It becomes increasingly important to improve the techniques and architectures used for interconnecting the elements and routing signals between the logic blocks. The performance of the integrated circuit depends in part on the performance of the signals through the interconnect lines.
An example of one factor that reduces the performance (and may also affect the functional reliability of the logical circuitry) of the interconnect is crosstalk or cross-coupling between the interconnect lines. In particular, crosstalk interference glitches which may occur on rising and falling edges of the main signal are amplified by the receiving buffer if these glitches arc in the high gain region of that buffer. This effect may lead to double clocking, which would create logical errors in the function circuitry. Further, the performance of the interconnect lines may also be slower because of the increased propagation delay due to the crosstalk.
These problems and concerns will become more significant as it becomes possible to fabricate denser integrated circuits. With increased microminiaturization, interconnect wires on the integrated circuit will be closer together. According to wellknown physics principles, a shorter distance between the interconnect leads to an increase the capacitance between the interconnect lines. An increased capacitance between the interconnect lines increases the crosstalk or cross-coupling between the interconnect lines.
As can be seen, improved techniques and circuitry for interconnecting signal lines are needed, especially techniques for improving interconnect lines and their use to provide improved performance and greater integrity and reliability.